Details of U.S. Patent Application 17/982136
Title: Systems and Methods to Generate a Miss Ratio Curve where Cache Data has a Time-To-Live
Inventors: Sari Sultan, Kia Shakiba, Albert Lee, Michael Stumm, Ming Chen, and Chung-Man Chow
Filing number: 17/982,136
Filing date: November 7, 2022
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Abstract:
For a given application, increasing the size of a cache is beneficial up to a certain point and the number of hits does not increase significantly with a greater cache size. This disclosure provides a method to determine a miss ratio curve, for a cache having data blocks with a time-to-live. A hashed value of a data block's key address can be used to generate a 2D HLL counter for storing expiry times of the data blocks. The 2D HLL counter can be converted to a 1D array, from which a stack distance can be calculated. A frequency distribution of stack distances can then be converted into a miss ratio curve, from which an appropriate cache size can be selected.
Classification:
BibTeX:
@patent(CacheTTL-Patent-12411777,
title = {Systems and Methods to Generate a Miss Ratio Curve where Cache Data has a Time-To-Live},
author = {Sari Sultan and Kia Shakiba and Albert Lee and Michael Stumm and Ming Chen and Chung-Man Chow},
day = {21},
yearfiled = {2022},
monthfiled = {November},
dayfiled = {7},
filing_num = {17/982,136},
)